Redundancy circuit and method for providing word lines driven by

Details Redundancy circuit and method for providing word lines driven by Redundancy circuit and method for providing word lines driven by

1996-08-02

1998-09-22

Mai, Son

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, 327525, G11C 700

Patent

active

058124659

ABSTRACT:
The present invention disables defective rows in a FIFO or other buffer where the word lines of the FIFO buffer are driven by a shift register scheme. Additional enabled rows may be placed within the normal memory array. The additional enabled rows are substituted, as needed, for one or more defective rows. As a result, a defective row can be disabled without effecting the operation of the FIFO, particularly the read or write data path. In one example, the disabling effect is achieved by using one or more laser fuses. The present invention can be used to effectively bypass any single shift register element or a multiple number of shift register elements.

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