Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-12-26
2006-12-26
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S225700, C365S189070
Reexamination Certificate
active
07154791
ABSTRACT:
A redundancy circuit for use with a semiconductor memory device is provided. The redundancy circuit includes input address buffers for storing input address bits; fuse boxes for storing repair address bits; a comparator for comparing the input address bits stored in the input address buffers with the repair address bits stored in the fuse boxes; and a redundancy enable determiner for determining whether a redundant memory cell is to be applied to the memory device according to a comparison result of the comparator.
REFERENCES:
patent: 6094382 (2000-07-01), Choi et al.
patent: 6097645 (2000-08-01), Penney et al.
patent: 6118712 (2000-09-01), Park et al.
patent: 6426901 (2002-07-01), Wada
patent: 6536002 (2003-03-01), Kim
patent: 6538934 (2003-03-01), Sakata
patent: 6707730 (2004-03-01), Mori et al.
F. Chau & Associates LLC
Le Thong Q.
LandOfFree
Redundancy circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Redundancy circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Redundancy circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3718190