Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1995-07-24
1997-01-21
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, 3652257, G11C 2900, G11C 700
Patent
active
055965369
ABSTRACT:
A redundancy circuit selectively drives two or more redundancy memory cell arrays to improve the integration of a highly integrated semiconductor memory device. To do this, the redundancy circuit has at least two memory blocks, each having a plurality of normal memory cell arrays and a redundancy memory cell array for replacing a defective memory cell array, at least two redundancy cell array drivers respectively connected to at least two redundancy memory cell arrays for driving at least two redundancy memory cell arrays, a defective-cell-array detection fuse box for detecting address corresponding to a defective memory cell array, and a driving controller for driving one of at least two redundancy cell array drivers by outputs of the defective-cell-array detection fuse box and the block selection fuse box.
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patent: 5404331 (1995-04-01), McClure
Hyundai Electronics Industries Co,. Ltd.
Nguyen Tan T.
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