Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1978-03-10
1991-09-03
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
365 49, 365185, G11C 1504, G11C 1134, G11C 700
Patent
active
050460463
ABSTRACT:
A redundancy programming circuit employing a two EPROM cell CAM for storing programmed states of redundant elements. The CAMs are disposed aside a memory array and word lines of the array are extended to the CAMs for programming the CAMs. Two word lines are coupled to each EPROM cell so that programming can still be achieved in the event one of the lines is defective.
REFERENCES:
patent: 4250570 (1981-02-01), Tsang et al.
Bauer Mark
Kliza Phil
Sweha Sherif
Intel Corporation
Lane Jack A.
Popek Joseph A.
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