Coating apparatus – Gas or vapor deposition – With treating means
Reexamination Certificate
2001-05-11
2003-04-29
Dang, Thi (Department: 1763)
Coating apparatus
Gas or vapor deposition
With treating means
C118S7230AN
Reexamination Certificate
active
06553932
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to semiconductor processing equipment. More specifically, the invention relates to an apparatus and processing chamber for confining plasma gas within a processing zone of a processing chamber.
2. Description of the Related Art
In the fabrication of integrated circuits (IC) and other electronic devices, multiple layers of conducting, semiconducting, and dielectric materials are deposited on or removed from a surface of a substrate. Integrated circuit devices comprise horizontal and vertical conductive paths. Horizontal conductive paths or interconnects are typically referred to as lines, whereas vertical conductive paths or interconnects are typically referred to as contacts or vias. Contacts extend to a device on an underlying substrate, while vias extend to an underlying metal layer.
Thin films of conducting, semiconducting, and dielectric materials may be deposited, formed, or removed by a number of deposition techniques. The common deposition techniques in modern processing are physical vapor deposition (PVD), also known as sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), and now electroplating.
In a chemical vapor deposition (CVD) process, a substrate is exposed to a precursor gas which reacts at the surface of the substrate and deposits a product of the reaction on the substrate to grow a film thereon. This surface reaction can be activated in at least two different ways. In a thermal process, the substrate is heated to a sufficiently high temperature to provide the activation energy necessary to cause the precursor gas adjacent to the substrate to react and deposit a layer on the substrate. In a PECVD process, the precursor gas is subjected to a sufficiently high electromagnetic field that excites the precursor gas into energetic states, such as ions and radicals, which react on the substrate surface to form the desired material.
PECVD is one process used in the manufacture of semiconductor devices for depositing silicon carbide (SiC) on various substrates. Silicon carbide is one material useful as a barrier layer, etch stop, and as an anti-reflective coating (ARC), in multiple levels, including the pre-metal dielectric (PMD) level, in IC applications. A PECVD process for depositing SiC involves the introduction of silane gas (SiH
4
) and methane gas (CH
4
) into a processing chamber where the gases react and form a film layer of silicon carbide on a substrate positioned in the chamber. Gas distribution assemblies are commonly utilized in PECVD chambers to uniformly distribute gases over the substrate surface upon their introduction into the chamber. Uniform gas distribution is paramount to forming a uniform SiC deposition on the surface of a substrate.
FIG. 1
shows a cross-sectional view of a conventional dielectric deposition chamber
30
. The deposition chamber
30
comprises a pedestal
32
, chamber walls
34
, and a gas distribution assembly or showerhead
40
. The showerhead
40
typically presents a planar lower surface which acts as an electrode within the chamber. However, PECVD processes and hardware such as that shown in
FIG. 1
have demonstrated problems with deposition uniformity, reproducibility, and reliability in some processes. For example,
FIG. 2
shows a typical plasma charge density on a substrate processed using a conventional chamber as shown in FIG.
1
. As shown, the plasma charge density is not uniform across the entire surface of the substrate. Moreoever, the plasma density is greater at the edge of the substrate than the center as indicated by the numerical reference
77
. Typically, deposition uniformity is thicker or greater at the edge of the substrate compared to the center as a result of the increased plasma density around the perimeter of the electrode. Therefore, there exists a need for a cost effective solution to prevent plasma edge effects on deposition processes, thereby vastly improving deposition uniformity, reproducibility, and reliability.
SUMMARY OF THE INVENTION
The present invention provides an apparatus for confining plasma gas within a processing zone of a substrate processing chamber. In one aspect, an apparatus for confining a plasma within a processing chamber is provided which comprises an upper section having an annular electrode mounting surface, and a lower section integrally formed with the upper mounting section having an inner annular confinement wall and an outer annular confinement wall. The inner annular confinement wall diverges from the vertical at an angle toward the outer annular confinement wall to form a choke aperture. In another aspect, an apparatus is provided comprising an upper section having an annular electrode surface, and a lower section integrally formed with the upper section having an inner confinement wall and an outer confinement wall. In still another aspect, an apparatus for delivering a process gas is provided which comprises a gas distribution assembly having a gas inlet and a gas outlet, and an annular member comprising an upper section having an electrode mounting surface and a lower section integrally formed with the upper section having an inner annular confinement wall and an outer annular confinement wall.
In yet another aspect, a processing chamber is provided for confining a plasma within a processing chamber. The processing chamber comprises a chamber body defining a processing cavity, a substrate support member disposed in the processing cavity, a gas distribution assembly having at least one gas inlet and at least one gas outlet, and an annular member having an upper section comprising an upper section having an electrode mounting surface and a lower section integrally formed with the upper section having an inner annular confinement wall and an outer annular confinement wall.
REFERENCES:
patent: 5413673 (1995-05-01), Fujimoto
patent: 5919332 (1999-07-01), Koshiishi et al.
patent: 6074518 (2000-06-01), Imafuku et al.
Chen Gang
Liu Kuo-Shih
Silvetti Mario Dave
Veerasingam Ramana
Xu Ping
Applied Materials Inc.
Dang Thi
Moser Patterson & Sheridan
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