Reducing the effect of simultaneous switching noise

Details Reducing the effect of simultaneous switching noise Reducing the effect of simultaneous switching noise

2006-05-09

2006-05-09

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C326S026000, C327S020000

Reexamination Certificate

active

07043670

ABSTRACT:
An integrated circuit comprises a microprocessor for generating data signals along a data bus by way of an inverter to a plurality of input/output switching buffers. The buffers pass the data signals to a transmission bus for onward transmission to a receiving integrated circuit. A respective drain and source supply power to the buffers. A transition checking circuit monitors the number of data signals on the data bus simultaneously switching from a first to a second logic state and a control circuit counts the number of the simultaneous switching data signals and generates a flag signal when the count exceeds half the number of buffers. The flag signal is applied to the inverter to invert all of the data signals on the bus.

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