Reducing power consumption during MRAM writes using multiple...

Details Reducing power consumption during MRAM writes using multiple... Reducing power consumption during MRAM writes using multiple...

2006-08-08

2006-08-08

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S173000

Reexamination Certificate

active

07088608

ABSTRACT:
A reduced power method of writing MRAM bits is disclosed. The reduced power method includes writing MRAM bits by applying a first magnetic field having a low magnitude, then determining if the bit has switched. If not, a second magnetic field having a higher magnitude is applied. Applying magnetic fields to an MRAM bit cell is accomplished by sending a current pulse through a strip line adjacent to the MRAM bit cell. The technique can be performed for every write to an MRAM bit. Alternatively, the weaker magnetic field can be applied during system test or system initialization, and if the weaker field fails to write the bit to a desired value, the failing result is stored and each subsequent write to the MRAM bit utilizes the stronger magnetic field.

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