Reducing interrupt latency while polling

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling

Reexamination Certificate

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Details

C718S107000, C718S108000, C712S244000, C712S245000, C710S260000, C710S261000, C710S262000, C710S263000, C710S264000, C710S265000, C710S266000, C710S267000, C710S268000, C710S269000

Reexamination Certificate

active

07043729

ABSTRACT:
Systems, methods, and software for reducing system management interrupt (SMI) latency while operating in system management mode. The present invention implements a technique for exiting system management mode while waiting for polled hardware events, handling any pending lower-priority interrupts and then resuming polling. The present invention does this by multi-threading SMI source handlers, using an idle thread, and using protocols for software-generated system management interrupts that insure that lower priority interrupts are serviced.

REFERENCES:
patent: 5437039 (1995-07-01), Yuen
patent: 5465335 (1995-11-01), Anderson
patent: 6216173 (2001-04-01), Jones et al.
patent: 6427161 (2002-07-01), LiVecchi

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