Reducing false positives in configuration error detection...

Details Reducing false positives in configuration error detection... Reducing false positives in configuration error detection...

2006-04-19

2009-11-17

Lamarre, Guy J (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S725000, C714S723000, C714S719000, C362S038000, C362S039000

Reexamination Certificate

active

07620876

ABSTRACT:
A device reduces false positive memory error detections by using a masking unit and sensitivity mask data to exclude unused portions of the memory from the error detection computations. A device includes an error detection unit to read data from the memory and verify data integrity. The sensitivity mask data indicates unused portions of the memory. Unused portions of the memory may correspond with configuration data for unused portions of a programmable device. Each bit of the sensitivity mask data may indicate the usage of one or more bits of the data from the memory. In response to the mask data, the masking unit sets data from the unused portions of the memory to values that do not change the result of the error detection computations. This prevents any errors in data from the unused portions of the memory from raising an error signal.

REFERENCES:
patent: 4369511 (1983-01-01), Kimura et al.
patent: 6553523 (2003-04-01), Lindholm et al.
patent: 7257750 (2007-08-01), Singh et al.
patent: 7401280 (2008-07-01), Singh et al.

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