Reducing effects of noise coupling in integrated circuits...

Details Reducing effects of noise coupling in integrated circuits... Reducing effects of noise coupling in integrated circuits...

2005-07-19

2005-07-19

Elms, Richard (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S149000, C365S230030

Reexamination Certificate

active

06920059

ABSTRACT:
A method for reducing noise coupling in a memory array is disclosed. The memory array includes a plurality memory cells interconnected by wordlines, bitlines, and platelines. The memory cells are arranged in columns having first and second bitlines coupled to a sense amplifier. During a memory access, at least adjacent bitlines pairs are not activated. The selected bitline pair or pairs are provided with a plateline pulse.

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