Reduced stress plastic package

Details Reduced stress plastic package Reduced stress plastic package

1992-07-06

1994-01-11

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

257706, 257787, H01L 2302, H01L 2328, H01L 2312

Patent

active

052784460

ABSTRACT:
A plastic package (10) with a heat sink (11, 27, 28, 32) has a stress relief wall (18, 21, 33) formed on its upper surface. A semiconductor die (12) is mounted on the heat sink (11, 27, 28, 32) such that the top of a semiconductor die (12) is below the level of the top of the wall (18, 21, 33), and the wall (18, 21, 33) absorbs stresses which otherwise would be applied to the semiconductor die (12). The package (10) is simple to fabricate and assemble, and provides a mold lock (23, 24, 31) which serves to hold the plastic material (13) tightly to the heat sink (11, 27, 28, 32). Extra die bond material (26) can be used to increase heat flow without compromising other characteristics of the package (10).

REFERENCES:
patent: 4107727 (1978-08-01), Ikezawa et al.
patent: 4939570 (1990-07-01), Bickford et al.
patent: 4994897 (1991-02-01), Golubic et al.
patent: 5091341 (1992-02-01), Asada et al.
patent: 5138430 (1992-08-01), Gow, 3rd et al.

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