Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1998-03-12
2000-05-16
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438118, 438119, H01L 2144, H01L 2148, H01L 2150
Patent
active
060636505
ABSTRACT:
An LOC die assembly including a die dielectrically adhered to the underside of a lead frame. The adhesive is applied over a minimum cross-sectional area and number of attachment points to maximize flexure of leads extending over the active surface of the die. In this manner, flexure of the leads to accommodate filler particles lodged between the leads and the active surface of the die during transfer molding of a plastic encapsulant is maximized, and the point stresses on the active surface caused by the filler particles are reduced by the lead flexure.
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Brooks Jerry M.
Corisis David J.
King Jerrold L.
Kinsman Larry D.
Micro)n Technology, Inc.
Niebling John F.
Zarneke David A.
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