Reduced power/temperature controlled TTL tri-state buffer utiliz

Details Reduced power/temperature controlled TTL tri-state buffer utiliz Reduced power/temperature controlled TTL tri-state buffer utiliz

1986-03-06

1987-06-09

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307456, 307254, H03K 1900, H03K 19003, H03K 19088, H03K 1920

Patent

active

046722424

ABSTRACT:
A tri-level buffer circuit includes three phase splitter bipolar transistors. The buffer circuit consumes less power in the tri-state mode than in the low logic state by reducing the amount of current drawn through the tri-state control line. The buffer circuit incorporates a temperature-controlled current source which supplies a greater amount of current at a low temperature and supplies a smaller amount of current at a high temperature.

REFERENCES:
patent: 3560761 (1971-02-01), Kardash
patent: 4194132 (1980-03-01), Mrazek
patent: 4287433 (1981-09-01), Goodspeed
patent: 4321490 (1982-03-01), Bechdolt
patent: 4430585 (1984-02-01), Kirk, Jr.

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