Reduced power redundancy address decoder and comparison circuit

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S189070, C365S225700

Reexamination Certificate

active

06868019

ABSTRACT:
A redundancy address decoder for a memory having at least one bank of memory segmented into a plurality of memory blocks. The redundancy address decoder includes a plurality of redundancy comparison circuitry coupled to a respective programmable element block storing addresses that are mapped to redundant memory of a memory plane. The redundancy address decoder further includes redundancy driver select logic coupled to each of the redundancy comparison circuitry to activate a selected one of the redundancy comparison circuitry for comparing a portion of a memory address corresponding to a memory location with the programmed addresses of the respective programmable element blocks, which leads to power reduction for column accesses to the memory device. The selection of the redundancy driver is based on the memory bank in which the memory location is located.

REFERENCES:
patent: 5239511 (1993-08-01), Oh
patent: 5295101 (1994-03-01), Stephens, Jr. et al.
patent: 5311472 (1994-05-01), Ota
patent: 5337278 (1994-08-01), Cho
patent: 5471426 (1995-11-01), McClure
patent: 5724295 (1998-03-01), Beiley et al.
patent: 5848006 (1998-12-01), Nagata
patent: 5867433 (1999-02-01), Shen et al.
patent: 6018811 (2000-01-01), Merritt
patent: 6301164 (2001-10-01), Manning et al.
patent: 6314030 (2001-11-01), Keeth
patent: 6400618 (2002-06-01), Nakamura et al.
patent: 6424584 (2002-07-01), Seyyedy
patent: 6434064 (2002-08-01), Nagai
patent: 6466493 (2002-10-01), Menke et al.
patent: 6519192 (2003-02-01), Ooishi
patent: 6552937 (2003-04-01), Ladner et al.
patent: 6724670 (2004-04-01), Jones et al.
patent: 20030174568 (2003-09-01), Blodgett

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