Reduced-area architecture for padded-protocol interface

Details Reduced-area architecture for padded-protocol interface Reduced-area architecture for padded-protocol interface

2007-07-03

2007-07-03

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S005000, C710S006000, C710S065000, C710S070000, C709S246000, C709S247000, C341S050000, C341S067000

Reexamination Certificate

active

10964061

ABSTRACT:
A data converter for a padded protocol interface performs, on a first data sample, decoding operations requiring data from second and third data samples, while buffering the second data sample without buffering the third data sample. A state machine controlling the decoding operation waits an additional clock cycle, until the second sample has become the current sample and the third sample has become the second sample and thus is available.

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