Fishing – trapping – and vermin destroying
Patent
1985-09-11
1988-08-30
Larkins, William D.
Fishing, trapping, and vermin destroying
357 237, 357 60, 437 57, 437 83, 437 93, 437173, H01L 2704
Patent
active
047680768
ABSTRACT:
A CMOS IC is formed on a semiconductor crystalline surface having a plane azimuth (110) or (023), or of a plane azimuth close thereto (plane azimuth substantially in parallel with the above-mentioned planes), in order to increase the speed of operation.
At low temperatures, dependency of the carrier mobility upon the plane azimuth becomes more conspicuous as shown in FIG. 1, and the difference of mobility is amplified depending upon the planes. Therefore, employment of the above-mentioned crystalline planes helps produce a great effect when the CMOS device is to be operated at low temperature (e.g., 100.degree. K. or lower), and helps operate the device at high speeds.
REFERENCES:
patent: 3476991 (1969-11-01), Mize et al.
patent: 3603848 (1971-09-01), Sato et al.
patent: 3612960 (1971-10-01), Takeishi et al.
Kawamura et al., IEEE IEDM, Technical Digest, pp. 364-367, Dec. 4, 1983.
Gibbons et al., Applied Physics Letters, vol. 34, No. 12, Jun. 15, 1979, pp. 831-833.
Tsaur et al., Applied Physics Letters, vol. 40, No. 4, Feb. 15, 1982, pp. 322-324.
Aoki Masaaki
Hanamura Shoji
Ikeda Shuji
Isomae Seiichi
Masuhara Toshiaki
Hitachi , Ltd.
Larkins William D.
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