Recovery of electronic properties in process-damaged...

Semiconductor device manufacturing: process – Direct application of electrical current – Utilizing pulsed current

Reexamination Certificate

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C438S003000, C438S240000

Reexamination Certificate

active

06171934

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method for fabricating a ferroelectric integrated circuit that reduces or eliminates the degradation of electronic properties resulting from exposure to hydrogen and other damaging fabrication processes.
2. Statement of the Problem
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See Miller, U.S. Pat. No. 5,046,043. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO
3
-type ferroelectric oxides such as PZT (lead zirconium titanate) and PLZT (lead lanthanum zirconium titanate) have been studied for practical use in integrated circuits. Layered superlattice material oxides have also been studied for use in integrated circuits. See Watanabe, U.S. Pat. No. 5,434,102. Layered superlattice materials exhibit characteristics in ferroelectric memories that are orders of magnitude superior to those of PZT and PLZT compounds. Integrated circuit devices containing ferroelectric elements are currently being manufactured. Nevertheless, the persistent problem of hydrogen degradation during the manufacturing process hinders the economical production in commercial quantities of ferroelectric memories and other IC devices using either the ABO
3
-type oxides or the layered superlattice material compounds with the desired electronic characteristics.
A typical ferroelectric memory in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric capacitor typically contains a ferroelectric thin film located between a first or bottom electrode and a second or top electrode, the electrodes typically containing platinum. During manufacture of the circuit, the MOSFET is subjected to conditions causing defects in the silicon substrate. For example, the CMOS/MOSFET manufacturing process usually includes high energy steps, such as ion-mill etching and plasma etching. Defects also arise during heat treatment for crystallization of the ferroelectric thin film at relatively high temperatures, often in the range 500°-900° C. As a result, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET.
To restore the silicon properties of the MOSFET/CMOS, the manufacturing process typically includes a forming-gas, or hydrogen, annealing (“FGA”) step, in which defects such as dangling bonds are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as H
2
-gas heat treatment in ambient conditions. Conventionally, hydrogen treatments are conducted between 350° and 550° C., typically around 400-450° C. for a time period of about 30 minutes. In addition, the CMOS/MOSFET manufacturing process requires other fabrication steps that expose the integrated circuit to hydrogen, often at elevated temperatures, such as hydrogen-rich plasma CVD processes for depositing metals and dielectrics, growth of silicon dioxide from silane or TEOS sources, and etching processes using hydrogen and hydrogen plasma. During processes that involve hydrogen, the hydrogen diffuses through the top electrode and the side of the capacitor to the ferroelectric thin film and reduces the oxides contained in the ferroelectric material. The absorbed hydrogen also metallizes the surface of the ferroelectric thin film by reducing metal oxides. As a result of these effects, the electronic properties of the capacitor are degraded. This problem is acute in ferroelectric memories containing layered superlattice material compounds because these oxide compounds are particularly complex and prone to degradation by hydrogen-reduction. After the forming-gas anneal (FGA), the remanent polarization of the ferroelectrics is very low and no longer suitable for storing information. Also, an increase in leakage currents results.
Several methods have been reported in the art to inhibit or reverse hydrogen degradation of desired electronic properties in ferroelectric oxide materials. Oxygen-annealing at high temperature (800° C.) for about one hour results in virtually complete recovery of the ferroelectric properties degraded by hydrogen treatments. But the high-temperature oxygen-anneal itself may generate defects in silicon crystalline structure, and it may offset somewhat the positive effects of any prior forming-gas anneal on the CMOS characteristics. Special metallization layers and diffusion barrier layers have also been examined to minimize the effects of hydrogen during high-energy process steps and forming-gas annealing steps. The metallization schemes typically involve the use of materials that are prone to oxidation in an oxygen-containing environment at temperatures above 400° C. Aluminum, the primary metallization material, has a low melting point and cannot tolerate temperatures above 450° C. Encapsulation of the ferroelectric material with a hydrogen diffusion barrier layer is not completely effective practically, and it requires complex process schemes including depositing and removing the barrier material.
It is, therefore, desirable to find a method for fabricating ferroelectric integrated circuits that eliminates the degradation of electronic properties resulting from hydrogen-containing and other processing steps, but which does not add substantial changes to conventional CMOS processing or introduce complicated process schemes, such as encapsulation of ferroelectric material with hydrogen diffusion barriers.
3. Solution to the Problem
The invention provides a method for fabricating ferroelectric elements in integrated circuits that reverses the detrimental effects of hydrogen degradation and other fabrication-related damage in ferroelectric material oxides, avoids addition of complex and expensive processing schemes, and obviates counterproductive oxygen annealing. By eliminating high-temperature O
2
-recovery annealing and other complicated processing steps, such as encapsulation of the ferroelectric with diffusion barriers, previously considered essential for minimizing hydrogen degradation, the inventive method allows FeRAM manufacturers to continue using conventional hydrogen-rich plasma processes and forming-gas anneals (for surface-state curing) without the risk of permanent damage to the ferroelectric element.
A primary feature of the invention is performing a voltage-cycling recovery process to reverse the effects of hydrogen degradation, thereby recovering desired electronic and ferroelectric properties of the ferroelectric element. When possible, the voltage-cycling recovery process is performed after hydrogen-plasma processes, forming-gas anneal steps, and other high-energy steps of integrated circuit fabrication that cause oxide-damaging conditions.
An aspect of the invention is that the results of the voltage cycling recovery process are dependant on the voltage level and number of cycles, or frequency. The voltage-cycling recovery process is typically conducted at ambient room temperature. At ambient room temperature, the number of voltage cycles applied is in a range from approximately 10
4
cycles to 10
11
cycles, and the electrical pulses applied have a voltage amplitude in a range of from 1 volts to 15 volts. The number of cycles and the voltage amplitude can be decreased by performing the voltage cycling recovery process at a higher temperature, for example in a range from 30° to 200° C. Preferably the voltage-cycling recovery process is conducted at a temperature of about 125°-150° C.
If the integrated circuit fabrication process includes a forming-gas anneal, the forming-gas anneal is typically conducted at a temperature range fr

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