Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
1999-12-28
2002-03-12
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S030000
Reexamination Certificate
active
06356113
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to write driver circuitry for a magnetic data storage device, and in particular to a voltage-type write driver circuit for use with a transmission-line interconnect.
BACKGROUND OF THE INVENTION
Magnetic data storage devices, and in particular hard disk drive storage devices, have become an essential component in modem computer systems. An example of a well-known hard disk drive storage device
100
is shown in FIG.
1
. Hard disk drive
100
includes an enclosure
101
, which contains one or more magnetic media platters or disks
102
, read elements
104
, write elements
105
, an actuator arm suspension
106
, a transmission line (T/L) interconnect
108
, a read/write integrated circuit
110
, a flexible interconnect cable
112
, and a disk enclosure connector
114
. Magnetic media disks
102
store information on their surfaces. Read elements
104
and write elements
105
are mounted on actuator arm suspension
106
and are located in proximity to the surfaces of disks
102
. Actuator arm suspension
106
moves transducers
104
into proximity to a selected portion of disks
102
which contains the information to be read, or which will contain the information to be recorded. Write elements
105
write information in response to input electrical signals, and read elements
104
read recorded information and output electrical signals representing the information.
The electrical signals are communicated between read/write transducers
104
and read/write integrated circuit
110
over T/L interconnect
108
. Read/write integrated circuit conditions the electrical signals so that they can drive write element
105
during writing and amplifies the electrical signal from read element
104
during reading. Signals are communicated between read/write integrated circuit
110
and disk enclosure connector
114
over flexible cable
112
. Disk enclosure connector
114
conducts signals with circuitry external to disk enclosure
101
.
A profile view of the structure of hard disk drive
100
may be in FIG.
2
. Disk
102
include two disks,
102
A-B, and there are four read elements
104
A-D and four write elements
105
A-D. Read/write integrated circuit
110
selects one of the read or write elements, after which data can be read from or written to the selected element, as appropriate.
When comparing the spectral content of the read and write signals, the write signals have higher frequency components than the read signals due to the square wave nature of the write voltage/current signals. To achieve high-data rates, the write system must therefore employ high-frequency interconnection techniques between the read/write integrated circuit and the write elements.
In a typical hard disk drive storage system, the read/write integrated circuit is located relatively far away (approximately 5 cm) from the write and read elements. Due to the length of the T/L interconnect, it is difficult to obtain the desired performance during writing of information to the disk. The performance of the transmission line interconnect and system may be enhanced by implementing the designs disclosed in U.S. Pat. No. 5,608,591. However, problems still remain with the design of a voltage-type write driver circuit that will provide the desired performance.
SUMMARY OF THE INVENTION
The present invention is a recording channel front-end circuit for driving a write element over a transmission line interconnect that will provide the desired performance during writing of information. In one embodiment, the recording channel front-end circuit includes a voltage-type write driver coupled to the transmission line interconnect and operable to output a write driver signal to the transmission line interconnect and a receiver termination circuit coupling the transmission line interconnect to the write element. The receiver termination circuit may include an impedance matching network operable match a terminal impedance of the write element to a characteristic impedance of the transmission line interconnect.
In another embodiment, the recording channel front-end circuit includes a voltage-type write driver coupled to the transmission line interconnect and operable to output a write driver signal to the transmission line interconnect and a source termination circuit coupling the voltage-type write driver to the transmission line interconnect. The source termination circuit may include an impedance matching circuit operable match a terminal impedance of the voltage-type write driver to a characteristic impedance of the transmission line interconnect.
In one aspect of the present invention the voltage-type write driver may include a voltage reference circuit operable to output a selectable voltage and an output driver operable output voltage driving signals representing write data signal transitions, the output voltage driving signals having an amplitude depending on the selected voltage output from the voltage reference source. The voltage-type write driver may further include a write gate circuit operable to enable the voltage-type write driver when in a write mode operation and disable the voltage-type write driver when not in a write mode operation. The voltage-type write driver may further include an output driver circuit comprising field effect transistors. The voltage-type write driver may further include an output driver circuit comprising bipolar transistors and the voltage reference circuit is further operable to output a selectable voltage including a diode offset voltage. The voltage-type write driver may further include a digital select interface coupled to the voltage reference circuit operable to receive digital signals indicated a selected voltage and to control the voltage reference circuit so as to output the selected voltage.
In another aspect of the present invention, the output driver circuit may include an output driver circuit having two outputs, each output operable to output a signal having two levels, a first level being dependent on a reference voltage. The output driver may further include a pair of inverter circuits, each inverter circuit operable to drive one of the two outputs, the inverter circuits operable to drive a first output with the first level and a second output with a second level or the first output with the second level and the second output with the first level. Each inverter circuit may include field effect transistors or each inverter circuit may include bipolar transistors. If the inverter circuit includes bipolar transistors, the inverter circuit may include a voltage clamping circuit.
The present invention is advantageous when used in a magnetic data storage device.
REFERENCES:
patent: 4757395 (1988-07-01), Nishikawa et al.
patent: 4798972 (1989-01-01), Melanson et al.
patent: 5111080 (1992-05-01), Mizukami et al.
patent: 5264744 (1993-11-01), Mizukami et al.
patent: 5422608 (1995-06-01), Levesque
patent: 5559448 (1996-09-01), Koenig
patent: 5578939 (1996-11-01), Beers et al.
patent: 5585741 (1996-12-01), Jordan
patent: 5621335 (1997-04-01), Andresen
patent: 5808478 (1998-09-01), Andresen
patent: 6008665 (1999-12-01), Kalb et al.
patent: 6025742 (2000-02-01), Chan
patent: 404306914 (1992-10-01), None
Contreras John T.
Freitas David Anthony
Klaassen Klaassen Berend
Cho James H.
International Business Machines Corp.
Morgan & Finnegan , LLP
Tokar Michael
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