Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-03-05
1999-02-16
Coleman, Eric
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711100, G06F 1200
Patent
active
058729054
ABSTRACT:
The present invention is directed to the provision of a storage apparatus using a recording area management method and an error recovery processing method suitable for processing moving picture data and the like, wherein empty areas are registered separately in an empty area list for high-speed processing and an empty area list for low-speed processing according the classification made based on the result of comparing the length of each empty area with a minimum area length, and in the event of an error occurrence, a remaining time available for error processing is estimated from the difference between the time required to execute accumulated record or read requests and a limit time, and an error processing method, from among a plurality of error processing methods requiring different lengths of time for processing, is selected and carried out according to the remaining time.
REFERENCES:
patent: 5452418 (1995-09-01), Tatosian
patent: 5535399 (1996-07-01), Blitz
patent: 5574907 (1996-11-01), Jernigan
patent: 5649203 (1997-07-01), Sites
Ayaki Yasushi
Koudo Toshikazu
Kuno Yoshiki
Ono Hitoshi
Coleman Eric
Matsushita Electric - Industrial Co., Ltd.
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