Reconfigurable trace cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

10726838

ABSTRACT:
According to one embodiment a computer system is disclosed. The computer system includes a microprocessor and a chipset coupled to the microprocessor. The microprocessor removes stale branch instructions prior to the execution of a first cache line by finding existing branch prediction data for the first cache line.

REFERENCES:
patent: 5727208 (1998-03-01), Brown
patent: 5867422 (1999-02-01), John
patent: 6684298 (2004-01-01), Dwarkadas et al.
patent: 6782550 (2004-08-01), Cao
patent: 2004/0111708 (2004-06-01), Calder et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Reconfigurable trace cache does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reconfigurable trace cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reconfigurable trace cache will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3801915

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.