Reconfigurable semiconductor integrated circuit and...

Details Reconfigurable semiconductor integrated circuit and... Reconfigurable semiconductor integrated circuit and...

2006-10-02

2009-06-23

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

C326S038000, C326S041000

Reexamination Certificate

active

07551001

ABSTRACT:
A plurality of logic element groups LEG11to LEG33respectively include at least one logic element as a component of a reconfigurable semiconductor integrated circuit. Between any logic element groups engaging in data transmission/reception, e.g., LEG11and LEG12, clock out terminal and clock in terminal are connected via a line while data out terminal and data in terminal are connected via a delay element101. The logic element groups LEG11to LEG33are therefore independent of one another in terms of timing design. Thus, if redesign is necessary for a semiconductor integrated circuit completed with a plurality of logic element groups, only a new circuit may be designed and connected to an existing circuit, or an unnecessary logic element group may just be removed, to complete a new semiconductor integrated circuit.

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Akihito Azetsu, “Circuit Synchronization and Clock,” Interface, vol. 22-2, Mar. 1, 1996, pp. 197-200.
W. Takahashi et al., “Clock Routing Driven Placement in Semi-Synchronous Circuits,” The Institute of Electronics, Information and Communication Engineers, Technical Report of IEICE, CPSY97-69 (Oct. 1997).

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