Reconfigurable memory architecture

Electronic digital logic circuitry – Multifunctional or programmable – Significant integrated structure – layout – or layout...

Reexamination Certificate

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Details

C356S038000, C356S039000, C356S041000, C356S136000

Reexamination Certificate

active

06864716

ABSTRACT:
A pre-diffused high density array of core memory cells is provided in a metal programmable device. The peripheral logic is made up of gate array cells in the metal programmable device. The peripheral logic may be configured to access the core memory cells as various memory types, widths, depths, and other configurations. If the entire memory is not needed, then the unused memory cells can be used as logic gates. The application-specific circuit, including peripheral logic, memory interface logic, and memory configuration is programmed with a metal layer.

REFERENCES:
patent: 20030128050 (2003-07-01), Schultz

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