Reconfigurable electronic device having interconnected data...

Details Reconfigurable electronic device having interconnected data... Reconfigurable electronic device having interconnected data...

2006-09-05

2006-09-05

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S037000, C326S038000, C326S039000, C326S040000, C326S095000

Reexamination Certificate

active

07102386

ABSTRACT:
A reconfigurable electronic device (100), e.g., a field programmable gate array (FPGA) or another type of complex programmable logic device (CPLD), has a first data storage device (120) and a second storage device (220) that are interconnected in a dual port memory mode of the reconfigurable electronic device (100). In this mode, the first data storage device (120) is accessible by a first decoder (140) both in a read as well as in a write mode, and the second data storage device (120) is accessible by a second decoder (140) in a read mode, thus providing an efficient dual port memory implementation. In a preferred embodiment, the first data storage device (120) is coupled to the second data storage device (220) via a configurable data copy circuit (160) that is responsive to a configuration signal provided via a configuration signal input (170), thus allowing for a very area efficient implementation of a dual port memory for reconfigurable electronic device (100).

REFERENCES:
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IEEE transactions on VLSI systems, vol. 9, p. 509-523 by Kim et al. “A Reconfigurable Multifunction Computing Cache Architecture”, no date.

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