Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1999-08-24
2003-11-11
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S733000, C714S734000
Reexamination Certificate
active
06647511
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to digital processors, and more particularly to development tools for such processors.
BACKGROUND OF THE INVENTION
Microprocessors have found their way into a huge variety of products. Often the processor and its programming is completely “embedded” into the design of the device, hence the term “embedded processors” to describe such processors. Several examples of devices having embedded processors are cellular telephones, computer printers, high performance disk drives for computer data, and automobile control systems.
Development tools that are useful for general purpose (non-embedded) processors are not satisfactory for embedded processor development. In other words, the test procedures for production of the processor itself may not be satisfactory for testing the processor in its embedded environment. It is more difficult to have visibility into processor operation. To solve this problem, one technique that is being increasingly used is referred to as “emulation”.
In general, an emulator, whether software or hardware, permits direct control by a designer over a target processor. Because it is the application in which the processor will be used, and not the processor itself, that is being designed, the emulator must emulate the processor's operation.
In-circuit emulation, commonly referred to as ICE, uses emulators that are typically a combination of hardware and software. The emulator is typically connected between the embedded processor and a host CPU that is running debugging software. The emulation is “in-circuit” in the sense that the processor may be connected to the emulator while it is embedded into the system in which it is to be embedded.
Real-time in-circuit emulation permits a software designer to monitor, analyze, and modify code without impacting operation of the device in which the processor is embedded. The behavior of the emulator is identical to that of the target processor. For example, in the case of an embedded processor for a disk drive, the emulator might permit the designer to modify the code while the disk drive continues to run normally.
SUMMARY OF THE INVENTION
One aspect of the invention is a reconfigurable datapath that can provide multiple debug functions. The datapath is comprised of the following elements: a first set of register bitcells that form a reference register bitcell unit, a second set of register bitcells that form a mask register bitcell unit, and a set of comparator bitcells that form a comparator bitcell unit. Each of the register bitcells has a half adder, a register input multiplexer for selecting between a number of inputs, at least one said input being a counter input from the half adder and at least one input being a write input, and a flip flop for storing a selected one of the inputs. The half adder receives a carry chain input and the output of the flip-flop. Each of the comparator bitcells has NOR logic for receiving a bus input and a mask input, as well as XOR logic that receives the output of the NOR gate and a signal from the reference register unit. The XOR logic provides a compare result signal that is used differently (or not used) depending on the debug mode for which the datapath is configured. The interconnections between the bitcell units and their inputs determine whether the datapath is to be used in a breakpoint mode, counter mode, DMA (direct memory access) mode, or PSA (parallel signature analysis) mode.
An advantage of the invention is that debug functions are implemented with a single reconfigurable datapath, rather than with a different module for each function. The cost of the debug logic is reduced. The different modes can be configured on the fly, by changing the contents of a configuration register. The reconfigurable datapath may be used in conjunction with a software debug system or as part of a “self-debug” unit of a processor.
REFERENCES:
patent: 5338984 (1994-08-01), Sutherland
patent: 5974435 (1999-10-01), Abbott
patent: 6058469 (2000-05-01), Baxter
patent: 6282627 (2001-08-01), Wong et al.
patent: 6510530 (2003-01-01), Wu et al.
Karthikeyan Madathil R.
Matt David R.
Menon Amitabh
Swoboda Gary L.
Beausoliel Robert
Brady III W. James
Duncan Marc
Petersen Bret J.
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