Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
1999-01-15
2003-03-25
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S016000, C710S019000, C710S036000, C709S241000, C709S241000, C713S002000
Reexamination Certificate
active
06539438
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to the field of computer hardware apparatus configuration and more specifically to a system and method of programming, reprogramming, and utilizing the hardware configuration of a reconfigurable computing board interfacing with a host computer.
BACKGROUND OF THE INVENTION
Typically hardware configurations for reconfigurable computing systems are designed for specific single applications to run one at a time with the reconfigurable computing system. Although an application's configuration may contain multiple hardware functions, the configuration is not usually designed for allowing different, unrelated applications to simultaneously share a single reconfigurable computing Field Programmable Gate Array (“FPGA”) level resource. The ability for a single configuration file to contain multiple independent hardware objects that interface to multiple application programs running on a host system is increasingly important as reconfigurable computing technology migrates to mainstream computing environments.
Currently existing reconfigurable computing interface driver programs lack additional capabilities that are needed in today's multi-tasking environments.
These include the managing of multi-tasking and multi-use of reconfigurable computing objects, transparent relocation of hardware objects, and flexible hardware interrupts for multiple hardware objects in reconfigurable computing systems. It is also common that each individual application configuration often has a corresponding unique software driver for interfacing application software, instead of having a single driver that all software applications can utilize.
The use of relocatable objects in the software environment is commonplace and has helped significantly advance application software development. However, when a functional object is implemented in hardware, the possibilities of one hardware object conflicting with another hardware object's address space becomes a real possibility. An accepted way to address this today with any type of hardware board is the use of a controller circuit between the host processor (system) and the hardware board, which allows hard-wired addresses on the peripheral board to be offset by a value determined by the host processor. The host processor may then manage offsets of all such peripherals so that none conflict with any other. Further, when multiple hardware objects used by different applications are shared in a common configuration implemented through a reconfigurable computing system board, conflicts due to the use of a single allocated interrupt for the board can arise if the hardware objects use interrupt functions.
Additionally, current reconfigurable computing systems do not possess the capability to allow hardware objects to be partitioned and repartitioned into different FPGAs on the same board. The ability to have multiple FPGAs on the same reconfigurable computing board, which can then be used to implement multiple hardware objects contained in a single configuration file among the different FPGAs, makes it possible for an application to run multiple configuration files simultaneously or to load different configuration files to be used in sequence. Furthermore, such a partitionable reconfigurable computing board has the capability for multiple applications to each load a configuration file on a separate FPGA. Similarly, a single application can use multiple hardware objects contained within different reconfigurable boards or FPGAs within the same board in a system. Hardware objects partitioned into the same or different FPGAs on the same board can then be allocated intelligently as the need arises.
Different types of FPGA's used in a reconfigurable computing board require different implementations of a configuration file which may contain the same equivalent logic circuitry. Current reconfigurable computing systems do not have the capability for multiple configuration files targeted for different types of FPGA's, and providing the same or similar functionality, to be selected as necessary to properly interface a software application with the FPGA hardware type that is available in a system. The ability for an application program to be independent of the particular FPGA type used on a reconfigurable computing system board increases the flexibility associated with software and decreases the cost associated with software application development. The same is true for other board circuitry and for different hardware object versions.
Reconfigurable computing systems that can implement and perform highly algorithmic, repeated power-hungry tasks in hardware rather than in software can be especially useful in a portable computing environment. In a portable environment, both power and host system (processor) capabilities are at a premium, since a portable computing platform is by its nature limited in functionality by power requirements and physical size. A reconfigurable computing system that increases both the functionality and efficiency of a portable computer is therefore highly desirable.
In the personal computing environment additional functionality or interface capabilities can be provided by a Personal Computer Memory Card International Association (“PCMCIA”) card. These computer cards meet the minimum compliance requirements of the PCMCIA standard (which is hereby incorporated by reference). PCMCIA cards are typically used to add functionality or memory to a personal, portable or desktop computer (i.e., a host computer), as described in the PCMCIA standards. Many types of PCMCIA cards are available, including input/output (I/O), PCMCIA cards that transfer data between a host computer system and an I/O bus, and data acquisition PCMCIA cards.
A typical PCMCIA card includes a standard PCMCIA connector connected to a PCMCIA interface circuit through a standard PCMCIA bus. The PCMCIA interface circuit operates according to the standard PCMCIA protocol to send data to and receive data from a host computer. The typical PCMCIA card also may include an interface circuit and controls the operation of the functional hardware on the card. For example, if the PCMCIA card is a memory card, then the functional hardware is memory (e.g., a bank of random access memory (“RAM”), chips, or a hard disk drive) and the PCMCIA card controller controls reading and writing to the memory.
PCMCIA card core functions can be implemented as hard-wired logic or as programmable logic (e.g., one or more FPGAs). The programmable architecture of FPGAs is provided through programmable logic blocks interconnected by a hierarchy of routing resources. The FPGA are customized by loading programming data into internal static memory cells. FPGA programming data are design-specific data that define the functional operation of the FPGAs' internal blocks and their interconnections. These programming data can be implemented and stored as configuration files by the application requesting the use of the FPGA.
Typically, when a PCMCIA card having the PCMCIA card controller and interface circuit implemented in an FPGA(s) is inserted into an operating (i.e., powered) host computer, or is inserted into a powered-down host computer that is then powered-up, the FPGA is programmed with programming data stored in non-volatile memory (e.g., EPROM, EEPROM, flash memory, etc.) on the PCMCIA card. Additionally, the FPGA can be programmed upon the initialization of a new application within the host computer. However, the memory required to store the FPGA programming data generally consumes a measurable area of the PCMCIA card which could be used to provide other functions within the PCMCIA card.
SUMMARY OF THE INVENTION
Therefore, there is a need for an improved reconfigurable computing system and method with the ability to allow a software driver for a reconfigurable computing platform to translate hardware object address offsets for the application software. As hardware object libraries continue to be developed, and as FPGAs continue to increas
Flemmons James L.
Ledzius Robert C.
Maturo Lawrence R.
Gaffin Jeffrey
Perveen Rehana
Quickflex Inc.
Vinson & Elkins L.L.P.
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