Reconfigurable computing architecture for space applications

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C712S015000

Reexamination Certificate

active

10897888

ABSTRACT:
A reconfigurable computer includes a reconfigurable processing element configured to process raw payload data in accordance with a configuration that is applied to the reconfigurable processing element. The reconfigurable computer further includes a multi-port communication device comprising a first port at which at least a portion of the raw payload data is written to the multi-port communication device and a second port at which at least a portion raw payload data written to the multi-port communication device is read by the reconfigurable processing element. The reconfigurable computer further includes a controller coupled to the reconfigurable processing element. The controller applies the configuration to the reconfigurable processing element and wherein the controller performs at least one single event upset mitigation operation.

REFERENCES:
patent: 4922418 (1990-05-01), Dolecek
patent: 5606707 (1997-02-01), Tomassi et al.
patent: 5647050 (1997-07-01), Rhodes
patent: 5804986 (1998-09-01), Jones
patent: 5931959 (1999-08-01), Kwiat
patent: 6104211 (2000-08-01), Alfke
patent: 6263466 (2001-07-01), Hinedi et al.
patent: 6308191 (2001-10-01), Dujardin et al.
patent: 6317367 (2001-11-01), Sample et al.
patent: 6362768 (2002-03-01), Younis et al.
patent: 6400925 (2002-06-01), Tirabassi et al.
patent: 6661733 (2003-12-01), Pan et al.
patent: 6662302 (2003-12-01), Garey
patent: 6838899 (2005-01-01), Plants
patent: 6996443 (2006-02-01), Marshall et al.
patent: 7036059 (2006-04-01), Carmichael et al.
patent: 7058177 (2006-06-01), Trimberger et al.
patent: 7085670 (2006-08-01), Odom et al.
patent: 2002/0024610 (2002-02-01), Zaun et al.
patent: 2003/0161305 (2003-08-01), Hakkarainen et al.
patent: WO 99/48103 (1999-09-01), None
patent: 02097986 (2002-12-01), None
Carmichael et al., SEE and TID Extension Testing of the XILINX XQR18V04 4Mbit Radiation Hardened Configuration Prom, Military and Aerospace Programmable Logic Devices , pp. 1, 5, 10; figure 5, 2002, Publisher: XILINIX, Published in: US.
Carmichael, Correcting Single-Event Upsets Thruogh Virtex Partial Configuration, XILINIX Application Note 216, Jun. 1, 2000, Publisher: XILINIX, Published in: US.
Hulme et al., Configurable Fault-Tolerant Processor (CFTP) for Spacecraft Onboard Processing, 2004 IEEE Aerospace Conference Proceedings, Mar. 6, 2004, pp. 2269-2276, vol. 4, Publisher: IEEE, Published in: US.
Laplante, Electrical Engineering Dictionary, Engineering Handbooks Online, 2000, Publisher: ENGnetBase, Published in: US.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Reconfigurable computing architecture for space applications does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reconfigurable computing architecture for space applications, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reconfigurable computing architecture for space applications will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3946850

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.