Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Reexamination Certificate
2006-08-22
2006-08-22
Fleming, Fritz (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C370S431000
Reexamination Certificate
active
07096284
ABSTRACT:
The processor of a receiving device does not execute acquisition and release of resources of a band and a channel for the isochronous data transfer every time the processor receives data from the sending device by isochronous transfer, but executes the acquisition of the resources of the band and the channel for the isochronous data transfer via the bus and an I/F board only when the completion of a bus reset is detected and holds the resources until the next bus reset is caused. By this processing, the receiving device can consistently secure the resources necessary for the isochronous data transfer to the sending device so long as the resources acquisition is successfully achieved when the bus reset is completed. This therefore enables the prevention of the occurrence of a situation in which the receiving device becomes unable to receive the data from the sending device by the isochronous transfer due to a resource shortage caused by having failed in releasing the resources when the receiving device stopped the isochronous data transfer previously.
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Sony Corporation, “High-Speed Digital Interface, IEEE 1394, Application to Audio and Video Devices”, Japan, The Nikkan Kogyo Shimbun Ltds., Jan. 28, 2000, pp. 73-74.
Nakata Takeshi
Senoo Junya
Crowell & Moring LLP
Fleming Fritz
Franklin, Jr. Richard B.
Funai Electric Co. Ltd.
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