Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2007-02-13
2007-02-13
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S027000, C326S068000, C326S086000, C327S333000, C333S017300, C333S032000
Reexamination Certificate
active
11019191
ABSTRACT:
An exemplary embodiment matches the input impedance of the receiving device to characteristic impedance, even with the receiving device composed with the MOS transistor, with a receiving device for data transfer with the differential-current driven model including: a receiving node to receive a differential current signal; a current-voltage conversion device to convert current into a voltage corresponding to differential current signal from the receiving node; an impedance matching device to match the input impedance to characteristic impedance, including a low impedance circuit device that enables generation of a low impedance which is lower than the characteristic impedance of a sending-side transmission line that is connected to the receiving node as an input impedance of the receiving node; and a comparator into which a differential-voltage signal from the current-voltage conversion device is input as a comparison signal, and which outputs the comparison result thereof as an output data.
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Barnie Rexford
Crawford Jason
Seiko Epson Corporation
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