Receiving data from interleaved multiple concurrent...

Details Receiving data from interleaved multiple concurrent... Receiving data from interleaved multiple concurrent...

2006-07-18

2006-07-18

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S031000, C710S033000, C710S034000, C710S036000, C710S057000, C711S100000, C711S112000, C711S117000, C711S168000, C714S025000, C714S100000, C348S390100, C348S505000

Reexamination Certificate

active

07080169

ABSTRACT:
A FIFO memory receives data transfer requests before data is stored in the FIFO memory. Multiple concurrent data transfers, delivered to the FIFO memory as interleaved multiple concurrent transactions, can be accommodated by the FIFO memory (i.e., multiplexing between different sources that transmit in distributed bursts). The transfer length requirements associated with the ongoing data transfers are tracked, along with the total available space in the FIFO memory. A programmable buffer zone also can be included in the FIFO memory for additional overflow protection and/or to enable dynamic sizing of FIFO depth.

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