Receiver of semiconductor memory apparatus

Details Receiver of semiconductor memory apparatus Receiver of semiconductor memory apparatus

2011-05-03

2011-05-03

Nguyen, Tuan T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S189050, C365S189110, C327S074000, C327S085000

Reexamination Certificate

active

07936620

ABSTRACT:
A receiver of a semiconductor memory apparatus includes a first input transistor configured to be turned ON when an input signal is equal to or more than a predetermined level; a second input transistor configured to be turned ON when the input signal is equal to or less than the predetermined level; a first output node voltage control unit configured to increase a voltage level of an output node when the first input transistor is turned ON; a second output node voltage control unit configured to decrease the voltage level of the output node when the second input transistor is turned ON; a third input transistor configured to increase the voltage level of the output node when an inversion signal of the input signal is equal to or less than the predetermined voltage level; and a fourth input transistor configured to decrease the voltage level of the output node when the inversion signal of the input signal is equal to or more than the predetermined voltage level.

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patent: 2003-273938 (2003-09-01), None
patent: 10-1999-0086334 (1999-12-01), None

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