Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2001-03-22
2002-12-24
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S090000, C326S030000, C370S282000, C370S284000, C375S219000, C375S220000
Reexamination Certificate
active
06498511
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a signal transmission technology for transmitting signals at high speed between a plurality of LSI chips or a plurality of devices or circuit blocks within a single chip, or between a plurality of boards or machines, and more particularly, to a receiver, hybrid circuit, driver circuit, and signal transmission system for bidirectional signal transmission for carrying out such signal transmission in both directions simultaneously.
2. Description of the Related Art
In recent years, the performance of components used to construct computers and other information processing apparatuses has improved greatly; indeed, dramatic performance improvements have been made, for example, for semiconductor memory devices such as DRAM (Dynamic Random Access Memory) and processors and the like. The improvements in the performance of semiconductor memory devices, processors, and the like have come to the point where system performance cannot be improved further unless the speed of signal transmission between components or elements is increased. Stated more specifically, the speed of signal transmission between a main storage device such as a DRAM and a processor (i.e., between LSIs), for example, is becoming a bottleneck impeding performance improvement for a computer as a whole.
The need for the improvement of signal transmission speed is increasing not only for signal transmission between machines or boards (printed wiring boards), such as between a server and a main storage device or between servers connected via a network, but also for signal transmission between chips or between devices or circuit blocks within a chip because of increasing integration and increasing size of semiconductor chips, decreasing supply voltage levels (low-voltage-swing signals), etc. It is therefore desired to provide a receiver and hybrid circuit (hybrid) for bidirectional signal transmission, capable of achieving high-speed transmission. It is also desired to provide a driver circuit having a linear output impedance suitable for bidirectional transmission or multilevel transmission that can increase the efficiency of use of a signal transmission line or can reduce the number of signal lines without decreasing the signal transmission speed, and a signal transmission system using such a driver circuit.
In order to address the increase in the amount of data transmission between LSIs or between boards or machines, signal transmission speed per pin must be increased. This is to avoid an increase in package cost, etc. due to increased pin count. As a result, inter-LSI signal transmission rates exceeding 1 Gbps, for example, have been achieved in recent years, and in the future (three to eight years from now) signal transmission rates are expected to reach extremely high values (achieving very high signal transmission rates) such as 4 Gbps or even 10 Gbps.
At such high signal frequencies, however, loss occurs in the high signal frequencies due to the skin effect of a signal transmission line, which, coupled with such factors as high-frequency component reflections due to the effects of parasitic inductance and parasitic capacitance, limits the bandwidth of the transmission line. Such limitations may be alleviated, for example, by using large-core cables, but in applications where a large number of signal lines need to be bundled in parallel for large-capacity data transmission, there is a limit to increasing the diameter of the cable bundle. In this way, as the signal transmission frequency increases, there occurs a situation where the signal transmission line itself becomes a bottleneck in signal transmission.
To eliminate such a bottleneck, various techniques are employed, such as bidirectional transmission that transmits signals in both directions simultaneously and multilevel transmission that transmits a large number of bits using one symbol. In bidirectional transmission, a hybrid circuit is used that has the function of separating the net signal voltage for output by subtracting it from the signal voltage of the signal line the signal being sent out by the driver of the hybrid circuit.
Further, in high-speed signal transmission, it is practiced to terminate a signal line in the characteristic impedance of the transmission line (impedance matching) because non-matched line termination would cause signal reflections resulting in the disturbance of signal waveform. This impedance matching must be done not only at the receiving end of the signal line but also at the transmitting end. This is necessary to absorb reflections from impedance un-matched points, such as a connector and a package, at the transmitting end as well.
Among known methods practiced to reduce the number of signal lines are bidirectional transmission and multilevel transmission that transmit a plurality of bits using one symbol, but these methods require not only that the value of line termination be matched to the line impedance, but also that its nonlinearity be minimized. This is because if nonlinearity exists, in bidirectional transmission an error would occur when subtracting from the received signal the contribution being made by the driver at the receiving end, while in the case of multilevel transmission, the number of bits per symbol would be limited.
The prior art and problems associated with the prior art will be described in detail later with reference to drawings.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a receiver and hybrid circuit for bidirectional signal transmission, that resolve the problem of the kick-back noise that a hybrid circuit has on its input side. Another object of the invention is to achieve bidirectional transmission or multilevel transmission capable of utilizing the bandwidth of transmission line efficiently by providing linearity to the impedance of a driver circuit.
According to the present invention, there is provided a receiver for bidirectional signal transmission in which signals are sent and received in both directions over a signal transmission line, comprising a signal line connected to the signal transmission line; a first hold capacitor for holding a signal; a signal line voltage buffer circuit for buffering a voltage of the signal line; a hybrid circuit for outputting a received signal by separating the received signal from the signal line voltage buffered by the buffer circuit; and a decision circuit for making a decision on the logic value of the received signal separated and output by the hybrid circuit.
The decision circuit may generate a sum of a signal value obtained at the time that the hybrid circuit makes a decision on the logic value of the received signal separated and output by the hybrid circuit and a value obtained by multiplying an earlier obtained given signal value by a coefficient, and makes the decision by using the value of the generated sum. The buffer circuit may be a voltage buffer circuit, and the hybrid circuit may be a capacitive coupling hybrid circuit. The voltage buffer circuit may have a voltage gain of nearly unity, and the voltage buffer circuit and the signal line may be coupled together by a capacitor, and wherein during a non-operating period of the voltage buffer circuit, a node on the input side of the capacitor may be connected to an output of the voltage buffer circuit and an input node of the voltage buffer circuit may be precharged to a prescribed potential, thereby compensating for an offset voltage of the voltage buffer circuit.
The receiver may further comprise a reference voltage output circuit for controlling, in accordance with an output sequence of a driver a reference voltage for driving, an input node of the capacitive coupling hybrid circuit. The reference voltage output circuit may comprise a control voltage generating circuit for generating a plurality of control voltages in accordance with data of a signal sequence being sent out by the driver; a plurality of reference voltage buffers for receiving the control voltages and for genera
Takahashi Yuji
Tamura Hirotaka
Arent Fox Kintner Plotkin & Kahn
Tan V.
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