Receiver for a memory controller and method thereof

Details Receiver for a memory controller and method thereof Receiver for a memory controller and method thereof

2005-05-17

2005-05-17

Ellis, Kevin L. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

Reexamination Certificate

active

06895484

ABSTRACT:
A receiver for a memory controller. The memory controller sends a data request signal to a memory which responds to the data request signal by sending data and a data strobe signal back to the memory controller. The receiver comprises a delay circuit receiving and delaying the data strobe signal, an emulated data strobe signal generator receiving the data request signal to generate an emulated data strobe signal, a push pointer generator generating a plurality of push pointers having priorities, receiving and responding to the emulated data strobe signal by outputting the push pointers in an order according to the priorities, and a buffer receiving and responding to the delayed data strobe signal and the push pointers by storing the data in memory addresses corresponding to the push pointers.

REFERENCES:
patent: 6272065 (2001-08-01), Kim
patent: 6625702 (2003-09-01), Rentschler et al.
patent: 6629222 (2003-09-01), Jeddeloh
patent: 6675272 (2004-01-01), Ware et al.

Affiliated with

Also associated with

Rating

Receiver for a memory controller and method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Receiver for a memory controller and method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Receiver for a memory controller and method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3381364