Electronic digital logic circuitry – Reliability – Fail-safe
Reexamination Certificate
2007-02-13
2007-02-13
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Reliability
Fail-safe
C326S009000
Reexamination Certificate
active
10716615
ABSTRACT:
In a receiver circuit that receives data and clock signals through the cables, the number of transitions of a signal obtained based on the data or clock signal is detected by a frequency detection circuit, and when the number of transitions is not more than a predetermined set value, a signal for resetting the operation of a serial-parallel converter circuit included in a data processing unit is output, so as to control the output of received data. Thus, disconnection of the cable can be detected with low power consumption without providing a pull-up resistor and pull-down resistor and noise resistance can be improved.
REFERENCES:
patent: 4446437 (1984-05-01), Rinaldi
patent: 5301171 (1994-04-01), Blow et al.
patent: 6320406 (2001-11-01), Morgan et al.
patent: 6781456 (2004-08-01), Pradhan
Ebuchi Tsuyoshi
Iwata Toru
Yoshikawa Takefumi
Cho James H.
Matsushita Electric - Industrial Co., Ltd.
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