Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output addressing
Patent
1997-10-29
1999-09-28
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output addressing
710 15, 710 30, 710 46, 710 63, G06F 1314, G06F 1320
Patent
active
059580208
ABSTRACT:
The system of the present invention comprises a system for implementing a real time capability in peripheral devices. The system of the present invention functions with a computer system including a processor, a memory, and a video controller, each coupled to a system bus. A USB (universal serial bus) controller is also coupled to the system bus for interfacing peripheral devices on a USB cable to the computer system. A first and second register are included in the USB controller for storing a controller frame number and a controller frame remaining, and a second and third register are included in the peripheral device for storing a device frame number and a device frame remaining. The peripheral device is coupled to the USB controller via a USB cable. A screen reference register is coupled to receive the controller frame number and the controller frame remaining from the USB controller and is coupled to receive a reference signal from a video controller. In response to receiving the reference signal, the screen reference register stores the controller frame number and the controller frame remaining. The peripheral device transmits the device frame number and the device frame remaining to the computer system in response to the occurrence of an event. The controller frame remaining and the controller frame number are subsequently compared with the device frame remaining and the device frame number to determine a computer system time (e.g., a real time) of the occurrence of the event.
REFERENCES:
patent: 5535251 (1996-07-01), Sugawara
patent: 5717762 (1998-02-01), Aihara et al.
patent: 5812625 (1998-09-01), Potier et al.
patent: 5890015 (1999-03-01), Garney et al.
Chambers Peter
Eidson Mark
Evoy David R.
Goff Lonnie
Lee Thomas C.
Perveen Rehana
VLSI Technology Inc.
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