Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1994-07-06
1999-09-07
Tu, Trinh L.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 47, 714 25, 714820, G06F 1100
Patent
active
059481110
ABSTRACT:
A pair of substantially identical integrated circuit elements, in the form of microprocessors, are operated in response to the same instruction and data signals that are accessed from a memory by one of the integrated circuits. The accessed instruction and data signal are supplied, via a synchronous interface, to the second integrated circuit, which operates thinking that the supplied data and instruction signals were accessed by it in response to address and control signals. The states of the two integrated circuits are applied to comparator circuitry, both via buffered paths. The comparator circuitry is operated in response to control signals produced by the first integrated circuit to effect comparison on only those signals that are valid at any particular moment in time. Clock-synchronizing circuitry is included to ensure that predetermined state transitions of the clocks used to operate the first and second integrated circuit occur within a prescribed time period.
REFERENCES:
patent: 3810119 (1974-05-01), Zieve et al.
patent: 4183089 (1980-01-01), Daughton et al.
patent: 4358823 (1982-11-01), McDonald et al.
patent: 4451917 (1984-05-01), DeCoursey
patent: 4488297 (1984-12-01), Vaid
patent: 4506324 (1985-03-01), Healy
patent: 4569065 (1986-02-01), Cukier
patent: 4617679 (1986-10-01), Brooks
patent: 4677648 (1987-06-01), Zurfluh
patent: 4696051 (1987-09-01), Breeden
patent: 4696052 (1987-09-01), Breeden
patent: 4756010 (1988-07-01), Nelson et al.
patent: 4785453 (1988-11-01), Chandran et al.
patent: 4805195 (1989-02-01), Keegan
patent: 4807259 (1989-02-01), Yamanaka et al.
patent: 4843608 (1989-06-01), Fu et al.
patent: 4847838 (1989-07-01), Kralik
patent: 4851992 (1989-07-01), Nakayama
patent: 5023778 (1991-06-01), Simon, Jr. et al.
patent: 5132971 (1992-07-01), Oguma et al.
patent: 5226152 (1993-07-01), Klug et al.
patent: 5249188 (1993-09-01), McDonald
A Dynamically Tracking Clock Distribution Chip with Skew Control Dave Chengson, Lino Costantino, Aurangzeb Kahn, Duc Le, Lordson Yue Tandem Computers Inc. 19333 Vallco Parkway, Cupertino, CA 95014-2599 IEEE 1990 Custom Integrated Circuits Conference (CH2860-5/90/0000-0082 1990.
Duffy Paul A.
Garcia David J.
Taylor Mark A.
Tandem Computers Incorporated
Tu Trinh L.
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