Real time clock rate checker and recovery mechanism

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S354000, C375S371000, C375S373000, C327S141000

Reexamination Certificate

active

07817769

ABSTRACT:
A circuit, method, and system are disclosed. In one embodiment the circuit comprises a ring oscillator circuit having a plurality of delay elements, the ring oscillator circuit to generate a clock signal frequency, a checker circuit to compare a count of clock signal oscillations observed per complete loop of the ring oscillator circuit to a reference count, and to set a flag signal if the clock signal oscillation count is above a high threshold amount or below a low threshold amount.

REFERENCES:
patent: 6911872 (2005-06-01), Shah et al.
patent: 7184936 (2007-02-01), Bhandari
patent: 2004/0189359 (2004-09-01), Shah et al.
patent: 2004/0189405 (2004-09-01), Shah et al.
patent: 2006/0244543 (2006-11-01), Meltzer
patent: 2007/0124604 (2007-05-01), Feldstein et al.
patent: 2009/0233592 (2009-09-01), Stepanian

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