Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Patent
1995-01-31
1996-03-12
Westin, Edward P.
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
395550, 395856, H03K 1902
Patent
active
054989817
ABSTRACT:
In a ready signal control apparatus, connected between a CPU and a plurality of peripheral circuits, a ready signal generated from one of the peripheral circuits is transmitted to the CPU for only a certain definite time period after a selection signal is generated from the CPU.
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patent: 5032982 (1991-07-01), Dalrymple
patent: 5175820 (1992-12-01), Gephardt
patent: 5325521 (1994-06-01), Koyama et al.
patent: 5388216 (1995-02-01), Oh
NEC Corporation
Sanders Andrew
Westin Edward P.
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