Readout circuit and nonvolatile semiconductor memory device

Details Readout circuit and nonvolatile semiconductor memory device Readout circuit and nonvolatile semiconductor memory device

2005-12-19

2008-03-25

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S185200, C365S189050, C365S194000

Reexamination Certificate

active

07349276

ABSTRACT:
A readout circuit has: a sense amplifier circuit configured to sense a data stored in a memory cell transistor based on a current flowing through the memory cell transistor and a reference current flowing through a dummy cell transistor; and a voltage control circuit configured to apply a first voltage to a gate of the dummy cell transistor in a read operation. The memory cell transistor has a control gate and a floating gate. The voltage control circuit sets the first voltage such that a voltage between the gate and a source of the dummy cell transistor is lower than a voltage between the control gate and a source of the memory cell transistor.

REFERENCES:
patent: 5841719 (1998-11-01), Hirata
patent: 6473343 (2002-10-01), Ohba et al.
patent: 2003/0156478 (2003-08-01), Maruyama et al.
patent: 02-049519 (1990-10-01), None
patent: 09-320283 (1997-12-01), None
patent: 2001-229686 (2001-08-01), None
patent: 2004-030754 (2004-01-01), None

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