Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2007-02-13
2007-02-13
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S105000, C711S167000, C365S189040, C365S233100, C365S239000
Reexamination Certificate
active
10425002
ABSTRACT:
A method for reading, from a semiconductor memory, data having a data burst length greater than two includes, beginning at a first time, receiving, on an address bus, a first address part associated with memory cells to be addressed. At a second time that is later than the first time, a read command is placed on a command bus to initiate read access to the first memory cells and a second address part associated with memory cells to be addressed is received on the address bus. Beginning at a third time that is later than the second time, data associated with the first and second address parts is transferred to a data bus.
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Schmölz Paul
Täuber Andreas
Infineon - Technologies AG
Padmanabhan Mano
Song Jasmine
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