Static information storage and retrieval – Read/write circuit – Signals
Patent
1977-06-20
1978-11-28
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Signals
365149, G11C 700, G11C 1124
Patent
active
041279000
ABSTRACT:
An improved method for reading metal dual insulator semiconductor capacitor memories is disclosed. The memory contains a plurality of capacitor cells, each cell comprising a semiconductor substrate layer and a high conductivity layer sandwiching two insulator layers. The substrate is doped to provide avalanche breakdown in a surface depletion layer at a voltage comparable to the write voltage in the accumulation direction. According to the invention, a small variable voltage is applied across a selected cell or cells. The range of voltage includes a "flat-band" portion of the hysteresis loop describing the voltage-capacitance relationship for the capacitor memory. The unselected cells are maintained in a depletion state in which their capacitance is a minimum. A change or the absence of a change in the current through the capacitor indicates the state of the capacitor cell.
REFERENCES:
patent: 3416143 (1968-12-01), Goethem et al.
patent: 3590337 (1971-06-01), Wegener
patent: 3859642 (1975-01-01), Mar
patent: 3911464 (1975-10-01), Chang et al.
Gregor, Capacitor Storage Cell, IBM Technical Disclosure Bulletin, vol. 12, No. 1, 6/69, p. 202.
Raffel Jack I.
Yasaitis John A.
Hecker Stuart N.
Massachusetts Institute of Technology
Smith, Jr. Arthur A.
Walpert Gary A.
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