Read/write/restore circuit for memory arrays

Static information storage and retrieval – Systems using particular element – Ternary

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365177, 365190, 365203, 365208, 36518911, 365233, 3652256, G11C 1156

Patent

active

054652308

ABSTRACT:
A read/write/restore circuit is disclosed for use in a memory array such as a static RAM array. The circuit employs data and data-complement signals having three states in combination with a two-state address signal to perform read, write and restore functions for the array, to reduce the number of components and control lines needed. The circuit is preferably implemented in BICMOS technology.

REFERENCES:
patent: 4198700 (1980-04-01), Aoyama et al.
patent: 4397000 (1983-08-01), Nagami
patent: 4405868 (1983-09-01), Lockwood
patent: 4528646 (1985-07-01), Ochii et al.
patent: 4531068 (1985-07-01), Kraft et al.
patent: 4616342 (1986-10-01), Miyamato et al.
patent: 4636990 (1987-01-01), Buscaglia et al.
patent: 4644196 (1987-02-01), Flannagan
patent: 4658381 (1987-04-01), Reed et al.
patent: 4665505 (1987-05-01), Miyakawa et al.
patent: 4678940 (1987-07-01), Vasseghi et al.
patent: 4678943 (1987-07-01), Uragami et al.
patent: 4686396 (1987-08-01), Law et al.
patent: 4730279 (1988-03-01), Oktani et al.
patent: 4752913 (1988-06-01), Chan et al.
patent: 4817057 (1989-03-01), Kondo et al.
patent: 4821237 (1989-04-01), Iwahashi
patent: 4825413 (1989-04-01), Tran
patent: 4829479 (1989-05-01), Mitsumoto et al.
patent: 4839862 (1989-06-01), Shiba et al.
patent: 4841484 (1989-06-01), Watanabe et al.
patent: 4853898 (1989-08-01), Hashemi et al.
patent: 4858194 (1989-08-01), Terado et al.
patent: 4862421 (1989-08-01), Tran
patent: 4866674 (1989-09-01), Tran
patent: 4882507 (1989-11-01), Tatsumi et al.
patent: 4910714 (1990-03-01), Hartgring
patent: 4953127 (1990-08-01), Nagahashi et al.
patent: 4961168 (1990-10-01), Tran
patent: 4967102 (1990-10-01), Mahler
IBM TDB, vol. 16, No. 8, Jan. 1974, pp. 2677-2678, "Tristate Driver Utilizing Bipolar-Complementary Metal Oxide Semiconductor Technology".
IBM TDB, vol. 19, No. 11, Apr. 1975, pp. 3338-3339, "Lower Power FET Storage Cell".

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