Read write memory with negative feedback-controlled dummy memory

Details Read write memory with negative feedback-controlled dummy memory Read write memory with negative feedback-controlled dummy memory

1994-08-08

1995-12-05

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365207, 36518907, 365156, G11C 702

Patent

active

054735688

ABSTRACT:
A static random access memory comprises word lines for receiving a cell selection signal, and arrays of first memory cells connected to the word lines. First load circuits are respectively connected to the arrays of the first memory cells for supplying a voltage from a voltage source to the arrays. First amplifier circuits are connected respectively to the first memory cells. A second, or dummy memory cell identical to each of the first memory cells is provided for storing a predetermined binary digit. A second load circuit identical to each of the first load circuits supplies the voltage from the voltage source to the dummy memory cell. A second amplifier circuit identical to each of the first amplifier circuits is connected to the dummy memory cell. A comparator circuit generates an output representative of the deviation of a voltage developed by the second amplifier circuit from a reference voltage and negatively feeds it back to each of the first load circuits and to the second load circuit so that a voltage developed by each of the first memory cells is controlled to a level determined by the reference voltage.

REFERENCES:
patent: 4223394 (1980-09-01), Pathak et al.
patent: 4792928 (1988-12-01), Tobita
patent: 4802138 (1989-01-01), Shimamune

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