Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2006-10-24
2006-10-24
Fleming, Fritz (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S027000, C710S029000
Reexamination Certificate
active
07127534
ABSTRACT:
A method for managing read and write data congestion in a system for executing write and read data commands and having a buffer pool of blocks for temporarily storing read and write data is disclosed. Management of the buffer pool and the initiation of read and write commands ensures that free blocks are available to temporarily store read data arriving at a host bus adapter (HBA). If the currently available blocks would be substantially consumed by the total outstanding inbound read data requested, no more write data commands will be initiated. As inbound read data is received into the buffer pool and subsequently transferred out of the buffer pool to the initiator device, the blocks in the buffer pool are freed up. When the read data transfer is completed and sufficient buffer resources have been freed up, read and write data commands may resume.
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Jackson Thomas Patrick
Jones Marc Timothy
Nottberg Curtis Edward
Wiley David Robert
Emulex Design & Manufacturing Corporation
Fleming Fritz
Kim Harold
Morrison & Foester LLP
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