Read/write circuit including sense amplifiers for use in a dynam

Details Read/write circuit including sense amplifiers for use in a dynam Read/write circuit including sense amplifiers for use in a dynam

1993-04-20

1994-03-15

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365156, 365207, G11C 700, G11C 702, G11C 1100

Patent

active

052951030

ABSTRACT:
A read/write circuit for use in a dynamic RAM includes transistors connected in series between a pair of bit lines. A gate of the second transistor is connected to one bit line, a gate of the third transistor is connected to another bit line. A write control signal is provided to the gate of each of the first and fourth transistors. During a writing cycle, the gate control signal opens the gate circuit, and then the write control signal enables the first and fourth transistors to enable access from the data buses to the pair of bit lines, and during a reading cycle, the write control signal disables the first and fourth transistors to produce an amplified bit line data between the second and third transistors, and then the gate control signal opens the gate circuit to supply the amplified bit line data to the data buses.

REFERENCES:
patent: 4403306 (1983-09-01), Tokushige et al.
patent: 4829483 (1989-05-01), Ogihara
patent: 4858193 (1989-08-01), Furutani et al.
patent: 4947373 (1990-08-01), Yamaguchi et al.
patent: 4954992 (1990-09-01), Kumanoya et al.
patent: 4973864 (1990-11-01), Nogami
patent: 5027325 (1991-06-01), Katsura
patent: 5091885 (1992-02-01), Ohsawa
patent: 5132930 (1992-07-01), Furutani et al.
patent: 5208771 (1993-05-01), Shikata

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