Read only memory device

Static information storage and retrieval – Systems using particular element – Semiconductive

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365189, G11C 1140

Patent

active

047730471

ABSTRACT:
A read only semiconductor memory device which comprises a plurality of transistor pairs comprising two transistors of one and the other conductivity types arranged in a matrix manner, thus allowing only one of the two transistors constituting each transistor pair to be operated to obtain a predetermined logical output. By employing a structure of the transmission gate type as the transistor pair, high speed and reliable operation for raising a potential on the output line can be realized.

REFERENCES:
patent: 3550089 (1970-12-01), Ahrons
patent: 4228527 (1980-10-01), Gerber et al.
patent: 4532439 (1985-07-01), Kioke
"A Modular Memory Building Block Approach for VLSI", by Mazin et al., IEE Custom Integrated Circuits Conference, pp. 258-263, 1985.

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