Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2005-11-29
2008-10-21
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S733000, C714S734000, C714S732000, C714S736000, C714S005110, C365S201000
Reexamination Certificate
active
07441165
ABSTRACT:
A read-only memory (ROM) and a related method for controlling operations of the ROM are disclosed. A built-in self-test (BIST) circuit of the ROM verifies system data stored in a system area of a plurality of memory cells of the ROM according to verification data stored in a verification area of the memory cells of the ROM.
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Kao Shih-Chia
Tseng Tsai-Wang
Tung Shing-Wu
Hsu Winston
Prolific Technology Inc.
Trimmings John P
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