Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-10-27
2008-12-30
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S147000, C711S154000, C711S159000
Reexamination Certificate
active
07472228
ABSTRACT:
A method for managing requests for deferred updates to shared data elements while minimizing grace period detection overhead associated with determining whether pre-existing references to the data elements have been removed. Plural update requests that are eligible for grace period detection are buffered without performing grace period detection processing. One or more conditions that could warrant commencement of grace period detection processing are monitored while the update requests are buffered. If warranted by such a condition, grace period detection is performed relative to the update requests so that they can be processed. In this way, grace period detection overhead can be amortized over plural update requests while being sensitive to conditions warranting prompt grace period detection.
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Appavoo Jonathan
Krieger Orran Y.
McKenney Paul E.
Sarma Dipankar
Duft Walter W.
International Business Machines - Corporation
Kim Matt
Krofcheck Michael C
Raissinia Abdy
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