Read circuitry for an integrated circuit having memory cells...

Static information storage and retrieval – Read/write circuit – Particular read circuit

Reexamination Certificate

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Details

C365S174000, C365S189070, C365S189090, C365S203000, C365S204000, C365S233170, C365S242000

Reexamination Certificate

active

07957206

ABSTRACT:
An integrated circuit device (e.g., a logic device or a memory device) having a memory cell array which includes (i) a plurality of memory cells, wherein each memory cell is programmable to store one of a plurality of data states, and (ii) a bit line, having a plurality of memory cells coupled thereto. Memory cell control circuitry applies one or more read control signals to perform a read operation wherein, in response to the read control signals, a selected memory cell conducts a current which is representative of the data state stored therein. Sense amplifier circuitry senses the data state stored in the selected memory cell using a signal which is responsive to the current conducted by the selected memory cell. Current regulation circuitry is responsively and electrically coupled to the bit line during a portion of the read operation to sink or source at least a portion of the current provided on the bit line. Sensing circuitry responsively couples the current regulation circuitry to the bit line during the portion of the read operation.

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