Read circuit of nonvolatile semiconductor memory

Details Read circuit of nonvolatile semiconductor memory Read circuit of nonvolatile semiconductor memory

2005-01-18

2005-01-18

Nguyen, Viet Q. (Department: 2818)

Static information storage and retrieval

Read/write circuit

C365S191000, C365S196000, C365S205000, C365S210130

Reexamination Certificate

active

06845047

ABSTRACT:
An INVSRC node and a SAREF node are previously precharged. After a potential on a bit line is reset, the bit line (BLS node) is precharged. In this event, a clamp MOS transistor in a sense amplifier is in ON state, and an SA node is also precharged simultaneously. A precharge level is set to a value lower than a threshold voltage of an inverter. Subsequently, when SAEN transitions to “H,” a sense operation is performed. For reading data “0,” the SA node is rapidly increased to Vdd. For reading data “1,” the SA node slowly approaches to Vss. A change in the potential at the SA node is detected by the inverter.

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