Static information storage and retrieval – Read/write circuit
Patent
1988-01-14
1989-11-14
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
36518911, 365203, 365185, 365196, 307448, 307481, G11C 700, G11C 1134, H03K 19096, H03K 19017
Patent
active
048811998
ABSTRACT:
A read circuit is disclosed for integrated circuits of the logic circuit type, comprising a memory consisting of a matrix of memory cells, the reading of which is done by the detection of a current variation or voltage variation, the memory cells being each addressable by rows and columns selected by row and column decoders, the read circuit being connected to memory cells by a line known as a bit line, and comprising a bit line pre-loading circuit and a detection circuit that detects the conduction or non-conduction of the addressed memory cell. The read circuit comprises a parallel-connected second identical detection circuit, the two detection circuits being connected to a common node of the bit line by means which provide for the simultaneous detection, at each read operation, of a "1" or a "0" regardless of the state of the memory cell addressed, and which provide for obtaining the data read at the output of at least one detection circuit. The invention can be applied to EPROMs in particular.
REFERENCES:
patent: 4387444 (1983-06-01), Edwards
patent: 4443718 (1984-04-01), Hagiwara et al.
patent: 4475178 (1984-10-01), Kinoshita
patent: 4649521 (1987-03-01), Tsuchida et al.
patent: 4680491 (1987-07-01), Yokouchi et al.
patent: 4710900 (1987-12-01), Higuchi
Hecker Stuart N.
Koval Melissa J.
SGS-Thomson Microelectronics S.A.
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